Nondestructive electrical extraction of energy-resolved trap states in nanoscale polycrystalline-silicon-channel thin-film transistor

In nanoscale polycrystalline silicon (poly-Si) channel thin-film transistors (TFTs), carrier transport is critically dependent on grain-boundary-related trap states. In this study, a simple and nondestructive electrical framework that uses standard current–voltage characteristics only is developed to extract the energy-resolved effective trap density of states in nanoscale poly-Si channel TFTs. By revisiting the subthreshold slope formulation for fully depleted poly-Si TFTs, the trap density was reformulated as a gate-voltage-dependent effective quantity rather than a bias-independent constant. An analytical energy-mapping scheme based on a gate-to-channel potential coupling factor was used to convert the gate voltage-dependent trap density into an energy-resolved distribution. The extracted trap distributions exhibit a systematic dependence on the channel doping concentration, reflecting changes in the trap-assisted transport behavior in the subthreshold region. The proposed approach is validated because when compared with the effective density of states of crystalline silicon, the extracted trap density falls within a physically reasonable range. Owing to its simplicity, speed, and nondestructive nature, the proposed method enables rapid transistor-level trap characterization and is well suited for analyzing trap effects in nanoscale poly-Si logic and memory devices.