Enhanced non-ohmic drain resistance of 2DFETs at cryogenic temperature

The contact issue for two-dimensional (2D) material-based field-effect transistors (FETs) has drawn enormous attention in recent years. Although ohmic behavior is achieved at room temperature, the drain current of 2DFETs shifts from ohmic to non-ohmic behavior at cryogenic temperatures. In this work, we demonstrate that the shift is attributed to the asymmetric current reduction at the metal–semiconductor (MS) contact at low temperature. Under low drain bias, carriers tunnel from the source to the channel but diffuse to the drain side due to the channel-to-drain barrier, resulting in current suppression. By studying the properties of near-linear MS contact at different temperatures, we analyzed the mechanisms behind this phenomenon and the dependence on the metal-to-semiconductor barrier height. These findings provide new physical insight into the mechanisms underlying the change in linearity of the transistor characteristics in cryogenic regimes. This work studies the semiconductor physics of 2D material contact at cryogenic temperature and the importance of contact metal selection in the development of 2DFETs at cryogenic temperature.