Evaluation of the power loss in IGBT single transistor device under the condition of pulse duration of 100 ns

The improvement in the reliability and lifespan of insulated gate bipolar transistor (IGBT) devices and the enhancement of system efficiency under high-frequency pulse conditions are receiving increasingly wide attention, and all of these are closely related to the evaluation of the power loss of the IGBT. The traditional method for assessing the power loss of the IGBT is through curve fitting of the dual-pulse experimental results, without delving into the conduction process of the IGBT and without considering the IGBT model itself and the parasitic parameters present in the test circuit. In response to the condition of a pulse duration of 100 ns for IGBT single devices, a universal test circuit has been designed to measure the collector-emitter voltage waveform and the collector current waveform. A method based on Computer Simulation Technology for field-circuit co-simulation to evaluate the power loss of the IGBT has been proposed, which takes into account the parasitic parameters in the actual circuit. In this method, the 3D model of the IGBT device, as well as the circuit model of the test circuit, is established. The power loss curve of the IGBT was obtained from the evaluation model, and the results agree well with the power loss curve obtained from experiments. This method provides guidance for seeking lower power loss in order to improve the reliability and lifespan of the IGBT, as well as enhance system efficiency. It also provides theoretical guidance for further research on the thermal damage mechanism of the IGBT.