journal article·2024-06-01Open access

Experimental demonstration of plasmon–plasmon scattering paves the way for electromagnetic wave-based digital logic concept

H. J. De Los Santos, J. Ge, G. Wang, S. Ding, P. R. Berger, D. R. Gajula

AIP Advances· Volume 14· Issue 6

Abstract

We report the experimental demonstration of plasmon–plasmon scattering at room temperature in the inversion layer of a patterned metal–oxide–semiconductor structure. This fundamental result paves the way for the development of plasmon–plasmon scattering logic, a revolutionary digital logic concept based on the generation, propagation, and manipulation of plasmons in an electron fluid, which was previously theoretically projected to exhibit femtojoule power dissipations and femtosecond switching speeds, while not demanding expensive nanometer-scale silicon (Si) technology fabrication processes for its implementation.
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Research context

OpenAlex topics: Semiconductor materials and devices · Photonic and Optical Devices · Neural Networks and Reservoir Computing

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Affiliations

NanoMEMS Research, LLC 1 , Irvine, California 92604, USA

Department of Electrical Engineering, University of South Carolina 2 , Columbia, South Carolina 29208, USA

Department of Electrical and Computer Engineering, Ohio State University 3 , Columbus, Ohio 43210, USA

Institute of Electronics and Nanotechnology, Georgia Institute of Technology 4 , Atlanta, Georgia 30332, USA

Funding

Glenn Research Center

References (23)

Show source-provided references
1. Cramming more components onto integrated circuits, Reprinted from Electronics10.1109/N-SSC.2006.4785860 ↗
2. Design of ion-implanted MOSFET’s with very small physical dimensions10.1109/JSSC.1974.1050511 ↗
3. “After Moore’s law,” Technology Quarterly, The Economist, available at https://www.economist.com/technology-quarterly/2016-03-12/after-moores-law.
4. Status and future prospects of CMOS scaling and Moore’s law - a personal perspective
5. The forever exponential? Moore’s law: Past, present and future
6. A guide to short-channel effects in MOSFETs10.1109/MCD.1986.6311897 ↗
7. The end of CMOS scaling: Toward the introduction of new materials and structural changes to improve MOSFET performance10.1109/MCD.2005.1388765 ↗
8. Another step toward the end of Moore’s law: Samsung and TSMC move to 5-nanometer manufacturing - [News]10.1109/MSPEC.2019.8727133 ↗
9. Overview of beyond-CMOS devices and a uniform methodology for their benchmarking10.1109/JPROC.2013.2252317 ↗
10. The future of computing beyond Moore’s Law10.1098/rsta.2019.0061 ↗
11. 2022
12. From charge to spin and spin to charge: Stochastic magnets for probabilistic switching10.1109/JPROC.2020.2966925 ↗
13. Theory of nano-electron-Fluidic logic (NFL): A new digital ‘electronics’ concept10.1109/TNANO.2009.2031469 ↗
14. H. J. De Los Santos , U.S. patent 8,509,584(13 August 2013).
15. Neudeck · 1990
16. Charge relaxation in an anisotropic medium and in low dimensional media
17. 1999
18. Modeling terahertz plasmonic Si FETs with SPICE10.1109/TTHZ.2013.2262799 ↗
19. Shallow water analogy for a ballistic field effect transistor: New mechanism of plasma wave generation by dc current10.1103/PhysRevLett.71.2465 ↗
20. Seven hardware advances we need to enable the AI revolution
21. Technology prospects for data-intensive computing10.1109/JPROC.2022.3218057 ↗
22. Microstrip and Stripline Design, MT-094 TUTORIAL, available at https://www.analog.com/media/en/training-seminars/tutorials/MT-094.pdf.
23. 2001