journal article·2016-10-01Open access

Local mapping of interface traps using contactless capacitance transient technique

Haruhiko Yoshida, Hidenobu Mori

AIP Advances· Volume 6· Issue 10

Abstract

Contactless capacitance transient techniques have been applied to local mapping of interface traps of a semiconductor wafer. In contactless capacitance transient techniques, a Metal-Air gap-Oxide-Semiconductor (MAOS) structure is used instead of a conventional Metal-Oxide-Semiconductor (MOS) structure. The local mapping of interface traps was obtained by using a contactless Isothermal Capacitance Transient Spectroscopy (ICTS), which is one of the contactless capacitance transient techniques. The validity of the contactless ICTS was demonstrated by characterizing a partially Au-doped Si wafer. The results revealed that local mapping of interface traps using contactless capacitance transient techniques is effective in wafer inspection and is a promising technique for the development of MOS devices and solar cells with high reliability and high performance.
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Research context

OpenAlex topics: Integrated Circuits and Semiconductor Failure Analysis · Semiconductor materials and devices · Force Microscopy Techniques and Applications

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Affiliations

University of Hyogo Graduate School of Engineering, , 2167 Shosha, Himeji, Hyogo 671-2280, Japan

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