A surface potential-based DC model considering interface trap states for 4H-SiC power MOSFETs

In this paper, a surface potential-based physical model is described for the DC characteristics of 4H-silicon carbide power metal–oxide–semiconductor field-effect transistors. The proposed scheme is based on the charge-sheet model and accounts for the interface charges, which include the fixed oxide charges and the interface-trapped charges. An analytical and effective approximation of the surface potential as a function of gate voltage is proposed, which can serve as a basis for the surface potential-based DC model. Furthermore, it has been demonstrated that the measured I–V characteristics are well reproduced by the proposed drain current model in a wide range of bias voltages and temperatures.