Effect of traps and defects on high temperature performance of Ge channel junctionless nanowire transistors

We investigate the effect of traps and defects on high temperature performance of p-type germanium-on-insulator (GOI) based junctionless nanowire transistors (JNTs) at temperatures ranging from 300 to 450 K. Temperature dependence of the main electrical parameters, such as drive current (Ion), leakage current (Ioff), threshold voltage (Vt), transconductance (Gm) and subthreshold slope (SS) are extracted and compared with the reported results of conventional inversion mode (IM) MOSFETs and Si based JNTs. The results show that the high interface trap density (Dit) and defects can degrade high temperature reliability of GOI based JNTs significantly, in terms of Ioff, Vt variation, Gm-max and SS values. The Ioff is much more dependent on temperature than Ion and mainly affected by trap-assisted-tunneling (TAT) current. The Vt variation with temperature is larger than that for IM MOSFETs and SOI based JNTs, which can be mostly attributed to the high Dit. The high Dit can also induce high SS values. The maximum Gm has a weak dependence on temperature and is significantly influenced by neutral defects scattering. Limiting the Dit and neutral defect densities is critical for the reliability of GOI based JNTs working at high temperatures.