An investigation of optimal interfacial film condition for Cu-Mn alloy based source/drain electrodes in hydrogenated amorphous silicon thin film transistors

To aid in developing next generation Cu-Mn alloy based source/drain interconnects for thin film transistor liquid crystal displays (TFT-LCDs), we have investigated the optimal structure of a pre-formed oxide layer on phosphorus doped hydrogenated amorphous silicon (n+a-Si:H) that does not degrade TFT electrical properties. We use transmission electron microscopy (TEM) and electron energy loss spectroscopy (EELS) to examine composition depth profiles of and structural information for the Cu-Mn alloy/n+a-Si:H interface region. In aiming to achieve the same electrical properties as those of TFTs having conventional Mo source/drain electrodes, we have obtained three important findings: (1) in typical TFT-LCD manufacturing processes, no Mn complex oxide layer is formed because Mn cannot diffuse substantially into an n+a-Si:H surface during low temperature (below 300°C) processes and the growth of Mn complex oxide layer would also be limited by the absence of excess oxygen species; (2) a pre-formed silicon oxide layer much thicker than 1 nm severely degrades TFT electrical properties and therefore an ultrathin (≈1 nm) silicon oxide layer is required to prevent the degradation; (3) Cu diffuses into an n+a-Si:H layer at oxygen-deficient spots and thus uniform surface oxidation is required to prevent the diffusion.