Effect of dopant redistribution in gate electrode on surface plasmon resonance in InGaZnO thin-film transistors

To study the effect of dopant redistribution at/near the gate-dielectric/gate-electrode interface during high-temperature processing on surface plasmon resonance in InGaZnO thin-film transistor, boron-doped Si wafers (resistivity = 0.02–0.021 Ω·cm) are annealed in N2 at different temperatures (900, 1000, 1050, and 1100 °C) to achieve lower surface doping concentrations via dopant out-diffusion and then used as the gate electrodes. Compared with the unannealed device, the devices fabricated on 900, 1050, and 1100 °C-annealed wafers show lower carrier mobility because the reduced doping concentrations at/near their gate-dielectric/gate-electrode interfaces weaken the gate screening effect on the remote phonon scattering (RPS) of the gate dielectric on the neighboring channel electrons. However, the device annealed at 1000 °C unexpectedly shows much lower carrier mobility. This result together with process simulation, Secondary Ion Mass Spectrometry analysis, and Fourier-transform infrared spectroscopy implies that the hole plasma at/near the surface of its p-Si gate electrode can oscillate with a frequency equal/close to the vibration frequency of the atoms in the gate dielectric, and the consequent surface plasmon resonance can greatly enhance the RPS to produce a large mobility reduction. In summary, for all the annealing temperatures, the mobility reduction caused by the lower gate-surface doping concentration indicates the larger impact of the holes at/near the gate-electrode surface than those in the gate-electrode bulk on the RPS.