Integrated Design of Electrically Configurable Ferroelectric and Redox‐Based Memristors for Hardware‐Implemented Reservoir Computing

Abstract Reservoir computing (RC) offers advantages in processing time‐series data with reduced training costs and simpler architectures. This study presents a hardware‐implemented RC system utilizing multifunctional memristors fabricated using a single process. By leveraging a ferroelectric‐based memristor (FM) as a volatile reservoir layer and a redox‐based memristor (RM) as a non‐volatile readout layer, seamless integration without additional fabrication steps is achieved. The dual‐functional memristor structure enables electrical conversion from FM to RM, enhancing system scalability and versatility. Comprehensive electrical measurements, including low‐frequency noise analysis and weight update linearity evaluation, validate the memristors’ performance. Potentiation and depression processes achieve a linearity factor improvement to ensure precise synaptic weight tuning, with cycle‐to‐cycle variation <2.3%. Additionally, the ferroelectric‐based memristor exhibits a cycle‐to‐cycle variation of 3.52%, maintaining distinct reservoir states with minimal overlap. Offline training demonstrates a high classification accuracy of 93.3% on the Modified National Institute of Standards and Technology dataset, while online training achieves an accuracy of 88.2% with incremental pulse schemes, surpassing the accuracy of identical pulse schemes (65.1%). These results establish the practical viability of multifunctional memristors for neuromorphic systems, establishing a robust foundation for next‐generation computing technologies