journal article·2026-04Open access

Concealable and Field‐Free Physical Unclonable Function Based on Voltage‐Controlled Magnetic Tunnel Junctions

Thomas Neuner, Jaimin Kang, Jordan Athas, Christian Duffee, Noraica Davila Melendez, Jordan A. Katine, Pedram Khalili Amiri

Advanced Electronic Materials· Volume 12· Issue 8

Abstract

ABSTRACT Physical unclonable functions (PUFs) leverage intrinsic stochastic variations of physical properties to generate secure cryptographic keys. Magnetic random‐access memory (MRAM) is a strong candidate for PUF implementations due to its high density, reliability, and complementary‐metal‐oxide‐semiconductor (CMOS) compatibility. However, MRAM‐PUFs reported to date remain vulnerable to adversarial attacks such as side‐channel analysis, highlighting the need for effective concealment strategies. Here, a concealable PUF based on an array of 384 nanoscale perpendicular voltage‐controlled magnetic tunnel junctions (V‐MTJs) is demonstrated. The PUF uses a combination of deterministic and stochastic switching mechanisms for its operation. Variations in the spin transfer torque (STT)‐assisted switching voltage generate unique PUF responses, which are concealed through voltage‐controlled magnetic anisotropy (VCMA)‐induced stochastic switching. Once concealed, it is shown that the PUF responses can be reliably recovered by STT‐assisted deterministic switching. The proposed PUF is magnetic‐field‐free, reliable, and CMOS‐compatible, while exhibiting near‐ideal entropy (0.98) and inter‐Hamming distance (0.508). These results establish a pathway toward secure, scalable MRAM‐PUFs for future hardware security applications.
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Research context

OpenAlex topics: Physical Unclonable Functions (PUFs) and Hardware Security · Chaos-based Image/Signal Encryption · Integrated Circuits and Semiconductor Failure Analysis

SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.

Affiliations

Department of Electrical and Computer Engineering Northwestern University Evanston Illinois USA

Western Digital Corporation San Jose California USA

Funding

National Science Foundation

References (52)

Show source-provided references
1. 10.1016/j.comnet.2010.05.01010.1016/j.comnet.2010.05.010 ↗
2. 10.4236/jcc.2015.3502110.4236/jcc.2015.35021 ↗
3. 10.1145/331566910.1145/3315669 ↗
4. 10.1038/s41928-020-0372-510.1038/s41928-020-0372-5 ↗
5. 10.1109/JPROC.2014.232051610.1109/JPROC.2014.2320516 ↗
6. 10.1126/science.107437610.1126/science.1074376 ↗
7. 10.1038/s41570-017-003110.1038/s41570-017-0031 ↗
8. Physical Unclonable Functions for Device Authentication and Secret Key Generation
9. J. W.Lee D.Lim B.Gassend G. E.Suh M.Van Dijk andS.Devadas “A Technique to Build a Secret Key in Integrated Circuits for Identification and Authentication Applications ” in2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE 2004) 176–179.10.1109/VLSIC.2004.1346548 ↗
10. Sadeghi A.‐R. · 2010
11. 10.1038/s41578-019-0159-310.1038/s41578-019-0159-3 ↗
12. 10.1016/j.mattod.2017.07.00710.1016/j.mattod.2017.07.007 ↗
13. 10.1109/TED.2020.296540310.1109/TED.2020.2965403 ↗
14. 10.1063/1.507940710.1063/1.5079407 ↗
15. 10.1109/JSSC.2019.292071410.1109/JSSC.2019.2920714 ↗
16. 10.1038/s41928-023-00994-010.1038/s41928-023-00994-0 ↗
17. L.Zhang X.Fong C.‐H.Chang Z. H.Kong andK.Roy “Highly Reliable Memory‐Based Physical Unclonable Function using Spin‐Transfer Torque MRAM ”2014 IEEE International Symposium on Circuits and Systems (ISCAS) (IEEE 2014) 2169.10.1109/ISCAS.2014.6865598 ↗
18. 10.1002/aelm.20220107310.1002/aelm.202201073 ↗
19. 10.1063/5.001340810.1063/5.0013408 ↗
20. 10.1021/acsnano.4c0007810.1021/acsnano.4c00078 ↗
21. 10.1002/adma.20220355810.1002/adma.202203558 ↗
22. 10.1002/aelm.20230019510.1002/aelm.202300195 ↗
23. 10.1002/aelm.20230005610.1002/aelm.202300056 ↗
24. 10.1002/sstr.20240052710.1002/sstr.202400527 ↗
25. 10.1109/JPROC.2016.258341910.1109/JPROC.2016.2583419 ↗
26. U.Rührmair F.Sehnke J.Sölter G.Dror S.Devadas andJ.Schmidhuber “Modeling Attacks on Physical Unclonable Functions ”Proceedings of the 17th ACM Conference on Computer and Communications Security (ACM 2010) 237–249.10.1145/1866307.1866335 ↗
27. J.DelvauxandI.Verbauwhede “Side Channel Modeling Attacks on 65nm Arbiter PUFs Exploiting CMOS Device Noise ”2013 IEEE International Symposium on Hardware‐Oriented Security and Trust (HOST) (IEEE 2013) 137–142.10.1109/HST.2013.6581579 ↗
28. 10.1007/978-3-662-44709-3_2610.1007/978-3-662-44709-3_26 ↗
29. 10.1126/sciadv.abn775310.1126/sciadv.abn7753 ↗
30. 10.1126/sciadv.adr011210.1126/sciadv.adr0112 ↗
31. 10.1038/s41467-025-60415-y10.1038/s41467-025-60415-y ↗
32. 10.1063/1.356778010.1063/1.3567780 ↗
33. 10.1038/nmat280410.1038/nmat2804 ↗
34. 10.1063/1.353648210.1063/1.3536482 ↗
35. 10.1142/S201032471240002410.1142/S2010324712400024 ↗
36. J. G.Alzate P. K.Amiri andP.Upadhyaya “Voltage‐Induced Switching of Nanoscale Magnetic Tunnel Junctions ”2012 International Electron Devices Meeting(IEEE 2012): 29.5.1‐29.5.4.10.1109/IEDM.2012.6479130 ↗
37. 10.1063/1.493944610.1063/1.4939446 ↗
38. 10.1038/nmat317210.1038/nmat3172 ↗
39. 10.1038/nmat317110.1038/nmat3171 ↗
40. 10.1063/1.475381610.1063/1.4753816 ↗
41. 10.1063/1.498187810.1063/1.4981878 ↗
42. 10.1063/1.498315910.1063/1.4983159 ↗
43. 10.1038/s41467-018-03140-z10.1038/s41467-018-03140-z ↗
44. 10.1109/LED.2025.358995610.1109/LED.2025.3589956 ↗
45. 10.1109/TMAG.2015.244312410.1109/TMAG.2015.2443124 ↗
46. 10.1038/s43246-022-00310-x10.1038/s43246-022-00310-x ↗
47. 10.1016/j.jmmm.2007.12.01910.1016/j.jmmm.2007.12.019 ↗
48. 10.1109/LMAG.2012.219577510.1109/LMAG.2012.2195775 ↗
49. 10.1063/1.486915210.1063/1.4869152 ↗
50. 10.1109/TIFS.2018.279134110.1109/TIFS.2018.2791341 ↗
51. Design of a Fast and Low‐Power Sense Amplifier and Writing Circuit for High‐Speed MRAM
52. 10.1109/LMAG.2017.269396310.1109/LMAG.2017.2693963 ↗