Exploring Spatial Distribution of Intrinsic Oxide Trap by Decoupling Channel Thickness Effects in Amorphous IGZO TFTs

In this study, we propose an integrated approach to extract the intrinsic oxide trap density ( N ot,int ) in amorphous indium–gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) by combining low-frequency noise (LFN) measurements with sub-bandgap optical excitation. As the channel thickness ( T ch ) is scaled down from 30 to 3 nm, a pronounced increase in 1/ f noise is observed, accompanied by an enhanced subgap density of states (DOS) and increased Coulomb scattering arising from trap-limited conduction. Our results show that the elevated power spectral density (PSD), originating from bulk defect-induced carrier trapping and detrapping, can lead to a significant overestimation of oxide trap density ( N ot ) when conventional LFN analysis is applied. To address this issue, we introduce a compensated volume factor ( V f ) based on sub-bandgap optical illumination (λ = 450 nm, E ph = 2.75 eV) for suppressing bulk trap contributions and accounts for the effective conduction channel within the Debye screening length ( L D ). Specifically, the extracted N ot were corrected from 2.1 × 10 19 eV –1 cm –3, 1.2 × 10 20 eV –1 cm –3, and 3.1 × 10 20 eV –1 cm –3 to 1.4 × 10 19 eV –1 cm –3, 1.3 × 10 19 eV –1 cm –3, and 1.3 × 10 19 eV –1 cm –3, for 30, 10, and 3 nm devices, respectively, indicating trap distribution within an equivalent gate-oxide depth of approximately 1.4 nm-1.9 nm from the interface. Therefore, this methodology enables the separation of interface-related trapping effects from bulk noise contributions and provides a quantitative framework for identifying the intrinsic spatial distribution of oxide traps, thereby facilitating further gate stack and interface optimization in scaled devices. The proposed approach, considering the bandgap properties of the material, can be extendable for broad applicability across oxide semiconductor systems and device structures, offering a useful framework for performance and reliability enhancement in advanced TFT technologies.