Low-Temperature Laser-Crystallized Silicon Nanosheet Field Effect Transistors Enabling Monolithic 3D Integration

We report a low-temperature fabrication strategy for silicon nanosheet (SiNS) field effect transistors (FETs) that relies on single-step nanosecond laser annealing to enable an upper-tier integration in monolithic three-dimensional (3D) (M3D) architectures. Via the use of amorphous silicon (a-Si) as the channel material, we simultaneously achieved crystallization and source/drain dopant activation through nanosecond-pulsed Nd:YAG laser annealing, all within a sub-450 °C thermal budget. This single-step approach simplifies the fabrication process while minimizing thermal diffusion to the underlying layers, thus addressing key constraints in M3D integration. Through systematic control of the laser fluence, we identified an optimized process window that maximized the crystalline quality, minimized the interface trap density, and improved key electrical metrics, such as carrier mobility and subthreshold swing. Structural and electrical analyses, including transmission electron microscopy (TEM) imaging, interface trap extraction, and series resistance evaluation, confirmed that the laser-annealed devices achieved performance on par with that of those treated by conventional thermal processes. This scalable and thermally compatible technique offers a promising platform for the integration of high-performance logic devices in future 3D semiconductor systems.