In Situ Fabrication of Nano Transistors by Selective Deposition of a Gate Dielectric around Carbon Nanotubes

The CNT-SiO2 core-shell structure is particularly appealing because the insulating SiO2 layer wraps around the CNTs, functioning as a gate dielectric. However, it is still a challenge to expose both end-caps of the structure for enabling them to serve as electrodes, which additionally requires complicated postprocesses. Here, we present a unique CNTs-SiO2 core-shell structure where both ends are uncovered with SiO2 in a "peeled-wire" structure. In this structure, SiO2 particles partially encapsulate the CNTs during the synthesis, resulting in both end-caps of the nanotube being self-exposed and electrically conductive. The field-effect transistor build-up with this structure exhibits p-type characteristics with a linear conductance behavior on Id-Vd output performance. This approach for making self-formed electrodes in the CNT-SiO2 core-shell structure provides a simple and efficient way for applying them to future nanodevices in terms of process simplicity and cost effectiveness.