Source abstract
Abstract
As an alternative strategy for conventional high-temperature crystallization of metal oxide (MO) channel layers, the catalytic metal-accelerated crystallization (CMAC) process using a metal seed layer is demonstrated for low-temperature crystallization of solution-processed MO semiconductors. In the CMAC process, the catalytic metal layer plays the role of seed sites for initiating and accelerating the crystallization of amorphous MO films. Generally, the solution-processed crystalline-TiO2 (c-TiO2) films required high-temperature crystallization conditions (≥500–600 °C), showing low electrical performance with a high defect density. In contrast, the suggested CMAC process could effectively lower crystallization temperature of the a-TiO2 films, enabling high-quality c-TiO2 films with well-aligned anatase grains and low-defect density. The various crystalline catalytic layers were deposited over the earth-abundant n-type amorphous titanium oxide (a-TiO2) films. Also, then, the CMAC process was performed for facile low-temperature translation of solution-processed a-TiO2 to a highly crystallized state. In particular, the Al-CMAC process using the crystalline thin-aluminum (Al) catalytic metal seed layer facilitates low-temperature (≥300 °C) crystallization of the solution-processed a-TiO2 films and the fabrication of high-performance solution-processed c-TiO2 thin-film transistors with superior field-effect mobility, good on/off switching behavior, and improved operational stability.
Source: openalex_inverted_index · Quality: baseline
Affiliations
School of Electrical and Electronics Engineering, Chung-Ang University, Seoul 06974, Republic of Korea
Department of Medicine, University of Connecticut School of Medicine, Farmington, Connecticut 06030, United States
School of Advanced Materials Science and Engineering, Sungkyunkwan University, Suwon 16419, Republic of Korea
SKKU Advanced Institute of Nanotechnology (SAINT), Sungkyunkwan University, Suwon 16419, Republic of Korea
Department of Printed Electronics Engineering, Sunchon National University, Sunchon, Jeonnam 57922, Republic of Korea
Funding
National Research Foundation of Korea