journal article·2023-09-13

Area-Selective Atomic Layer Deposition for Resistive Random-Access Memory Devices

Il-Kwon Oh, Asir Intisar Khan, Shengjun Qin, Yujin Lee, H.-S. Philip Wong, Eric Pop, Stacey F. Bent

ACS Applied Materials & Interfaces· Volume 15· Issue 36
Publisher page

Abstract

Resistive random-access memory (RRAM) is a promising technology for data storage and neuromorphic computing; however, cycle-to-cycle and device-to-device variability limits its widespread adoption and high-volume manufacturability. Improving the structural accuracy of RRAM devices during fabrication can reduce these variabilities by minimizing the filamentary randomness within a device. Here, we studied area-selective atomic layer deposition (AS-ALD) of the HfO 2 dielectric for the fabrication of RRAM devices with higher reliability and accuracy. Without requiring photolithography, first we demonstrated ALD of HfO 2 patterns uniformly and selectively on Pt bottom electrodes for RRAM but not on the underlying SiO 2 /Si substrate. RRAM devices fabricated using AS-ALD showed significantly narrower operating voltage range (2.6 × improvement) and resistance states than control devices without AS-ALD, improving the overall reliability of RRAM. Irrespective of device size (1 × 1, 2 × 2, and 5 × 5 μm 2 ), we observed similar improvement, which is an inherent outcome of the AS-ALD technique. Our demonstration of AS-ALD for improved RRAM devices could further encourage the adoption of such techniques for other data storage technologies, including phase-change, magnetic, and ferroelectric RAM.
Source: openalex_inverted_index · Quality: baseline

Research context

OpenAlex topics: Advanced Memory and Neural Computing · Ferroelectric and Negative Capacitance Devices · Semiconductor materials and devices

SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.

Affiliations

Department of Chemical Engineering, Stanford University, Stanford, California 94305, United States

Department of Electrical and Computer Engineering, Ajou University, Suwon 16499, South Korea

Department of Intelligence Semiconductor Engineering, Ajou University, Suwon 16499, South Korea

Department of Electrical Engineering, Stanford University, Stanford, California 94305, United States

Funding

National Institute of Standards and Technology · National Research Foundation of Korea · Stanford University

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