Flat-Lying Semiconductor–Insulator Interfacial Layer in DNTT Thin Films
Source abstract
Abstract
The molecular order of organic semiconductors at the gate dielectric is the most critical factor determining carrier mobility in thin film transistors since the conducting channel forms at the dielectric interface. Despite its fundamental importance, this semiconductor-insulator interface is not well understood, primarily because it is buried within the device. We fabricated dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT) thin film transistors by thermal evaporation in vacuum onto substrates held at different temperatures and systematically correlated the extracted charge mobility to the crystal grain size and crystal orientation. As a result, we identify a molecular layer of flat-lying DNTT molecules at the semiconductor-insulator interface. It is likely that such a layer might form in other material systems as well, and could be one of the factors reducing charge transport. Controlling this interfacial flat-lying layer may raise the ultimate possible device performance for thin film devices.
Source: openalex_inverted_index · Quality: baseline
Research context
OpenAlex topics: Semiconductor materials and devices · Advancements in Semiconductor Devices and Circuit Design · Electronic and Structural Properties of Oxides
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
Affiliations
Energy Materials and Surface Sciences Unit (EMSS), Okinawa Institute of Science and Technology Graduate University (OIST), 1919-1 Tancha, Onna-son, Okinawa 904-0495, Japan
Pohang Accelerator Laboratory, POSTECH, Pohang 790-784, Republic of Korea
Emergent Molecular Function Research Group, RIKEN Center for Emergent Matter Science (CEMS), 2-1 Hirosawa, Wako, Saitama 351-0198, Japan
Funding
Okinawa Institute of Science and Technology Graduate University
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