journal article·2015-09-23

Selective Passivation of GeO2/Ge Interface Defects in Atomic Layer Deposited High-k MOS Structures

Liangliang Zhang, Huanglong Li, Yuzheng Guo, Kechao Tang, Joseph Woicik, John Robertson, Paul C. McIntyre

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Abstract

Effective passivation of interface defects in high-k metal oxide/Ge gate stacks is a longstanding goal of research on germanium metal-oxide-semiconductor devices. In this paper, we use photoelectron spectroscopy to probe the formation of a GeO2 interface layer between an atomic layer deposited Al2O3 gate dielectric and a Ge(100) substrate during forming gas anneal (FGA). Capacitance- and conductance-voltage data were used to extract the interface trap density energy distribution. These results show selective passivation of interface traps with energies in the top half of the Ge band gap under annealing conditions that produce GeO2 interface layer growth. First-principles modeling of Ge/GeO2 and Ge/GeO/GeO2 structures and calculations of the resulting partial density of states (PDOS) are in good agreement with the experiment results.
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Research context

OpenAlex topics: Semiconductor materials and devices · Semiconductor materials and interfaces · Advanced Memory and Neural Computing

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Affiliations

Engineering Department, Cambridge University, Cambridge CB2 1PZ, United Kingdom

Department of Precision Instrument, Tsinghua University, Beijing, China

Materials Science and Engineering Laboratory, National Institute of Standards and Technology, Gaithersburg, Maryland 20899, United States

Funding

Initiative for Nanoscale Materials and Processes, Stanford University · National Institute of Standards and Technology

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