Ferroelectric α-In₂Se₃ Semi-floating Gate Transistors for Multilevel Memory and Optoelectronic Logic Gate

Progress in artificial intelligence (AI) demands efficient data storage and high-speed processing. Traditional von Neumann architecture, with space separation of memory and computing units, struggles with increased data transmission, causing power inefficiency and date latency. To address this challenge, we designed a semi-floating gate transistor (SFGT) that integrates data storage and logical operation into a single device by employing a ferroelectric semiconductor α-In 2 Se 3 as a semi-floating gate layer. Leveraging the ferroelectric polarization of α-In 2 Se 3, the device exhibits improved non-volatile memory performance with a high program/erase ratio of 1 × 10 6 and reliable durability over 1000 cycles. Through the dual-gate modulation, the SFGT achieves multilevel storage function with at least seven controllable programming states and performs three types of digital logic gate operations (“AND”, “NOR”, and “OR”) at an ultralow bias of 10 mV. Compared to traditional FGT architectures, the α-In 2 Se 3 -based semi-floating gate structure achieves multifunctional integration of data storage and logic computing, effectively addressing energy consumption and time delay issues in data transmission, making it highly significant for applications in data-intensive and low-power integrated circuits.