When Are Capacitance–Voltage, Drive‐Level Capacitance Profiling, and Fast‐CV Actually Insensitive to Interface and Bulk Defects?

Capacitance–voltage (CV), drive‐level capacitance profiling (DLCP), and Fast‐CV are widely used to probe shallow doping in semiconductor devices such as thin‐film solar cells, but bulk and interface defects can distort the extracted profiles. To clarify their accuracy, we simulated these techniques on a CIGS solar cell using self‐consistent, time‐dependent Sentaurus‐TCAD simulations. When deep acceptor bulk defects are comparable to or exceed the shallow dopant concentration, CV profiles are distorted at all AC frequencies, DLCP remains reliable for AC frequency exceeding the bulk trap emission rate and Fast‐CV for DC bias sweep rate sufficiently high. Defects exactly at the interface with constant occupation do not affect CV or DLCP, whereas those crossing the Fermi level under reverse bias distort CV at all frequencies and DLCP at low frequencies. Fast‐CV can yield accurate profiles across both low and high AC frequencies, provided that the DC bias sweep rate exceeds the trap response time. However, defects near the interface, not crossing E _F, may remain undetected by all three techniques still contributing to performance losses. These results underscore the value of simulations for interpreting capacitance‐based measurements and extend their relevance to one‐sided junctions in materials such as CdTe, halide perovskites, GaN, Ga ₂ O ₃ , etc.