A novel SiC superjunction trench MOSFET with integrated heterojunction diode for reduced power loss and saturation current

Abstract A novel silicon carbide (SiC) superjunction trench metal-oxide-semiconductor field-effect transistor (SJ TMOS) with integrated heterojunction diode (HJD-SJ TMOS) is proposed and characterized to effectively reduce power loss and saturation current ( I _dsat ). The integration of the poly-silicon HJD beneath the gate trench not only improves the performance of the body diode but also deceases the gate–drain capacitance ( C _gd ), thereby significantly reducing the power loss of the HJD-SJ TMOS. Moreover, the poly-silicon and P+ shield layer connected to it further enhance the junction field-effect transistor (JFET) effect below the MOS channel, which efficiently reduces I _dsat . Simulation results show that compared to the conventional SiC SJ TMOS, the proposed device exhibits a 50.0% and 25.8% reduction of the conduction voltage drop and reverse recovery charge for the body diode, respectively. Moreover, the gate-drain charge ( Q _gd ) is reduced by 96.0%, which contributes to a 91.2% reduction in switching loss. Furthermore, compared to the conventional one, I _dsat is also reduced by 71.7%, which brings a significant increase of short-circuit withstand time for the proposed device. Although the specific on-resistance ( R _on,sp ) for the proposed device shows a 15.7% increase, the better shielding effect provided by the P+ shield layer significantly improves the Baliga figure of merit with increased breakdown voltage.