Context-aware pattern embedding and similarity ranking using machine learning for hotspot detection and in-design fixing optimization in design technology co-optimization

BackgroundTwo-dimensional pattern matching is widely used for detecting known hotspots in semiconductor layout designs, but traditional methods require extensive manual effort to define deterministic match rules and fuzziness constraints. This subjectivity limits the accuracy and scalability of hotspot coverage.AimWe present a semi-supervised learning framework that automates similarity profiling and master pattern library generation, based on a small set of known hotspots. The objective is to enhance coverage of topological variants and reduce manual intervention in hotspot definition.ApproachThe methodology begins with a multi-radius pattern (MRP) search to collect candidate patterns exhibiting varying degrees of similarity to the core hotspot. These are processed through a feature extraction pipeline that includes custom geometric descriptors and bitmap encoding. Dimensionality reduction using principal component analysis (PCA) is applied to derive a reduced feature space for similarity computation. Patterns are ranked using Euclidean distance to the hotspot in PCA space and clustered to generate a fuzzy-tolerant master library.ResultsWhen applied to full-chip layouts, the framework expands pattern capture from 7262 exact matches to over 131,000 similarity-ranked instances. These instances preserve the core failure geometry while tolerating contextual variation, significantly improving hotspot coverage and library completeness.ConclusionsThe proposed flow enables a systematic, data-driven approach for hotspot profiling and library creation. By automating fuzziness inference and leveraging similarity metrics in reduced feature space, the method supports efficient identification of topological variants and integration into design rule constraints plus (DRC+) and in-design fixing tools.