UC-ILT: U-Net with Ctrans inverse lithography techniques

BackgroundMask optimization is essential in very-large-scale integration (VLSI) design to achieve manufacturability as feature sizes continue to shrink. This evolution presents significant challenges in printability and computational efficiency. The inverse lithography technique (ILT), a widely adopted resolution enhancement technique, enhances mask quality but is often hindered by high computational demands.AimWe aim to develop an efficient and high-quality mask optimization framework that addresses the computational challenges of ILT while improving mask printability.ApproachWe propose UC-ILT, a novel mask optimization framework that integrates the convolutional block attention module, a channel-wise cross fusion transformer, and pixel shuffle layers for efficient upsampling. This hybrid approach enhances feature extraction, accelerates model training, and improves mask printability by leveraging advanced attention mechanisms and efficient upsampling techniques.ResultsQuantitative evaluations demonstrate that UC-ILT significantly enhances mask printability and reduces model-building time. The framework effectively addresses critical challenges in ILT mask optimization, achieving superior performance metrics compared with existing methods.ConclusionsUC-ILT advances VLSI mask optimization by improving manufacturability and computational efficiency. This framework contributes to the semiconductor industry by facilitating faster design cycles and enhancing mask quality, thereby supporting the production of advanced semiconductor devices.