Current Conduction and Dielectric Behavior of High k-Y2O3 Films Integrated with Si Using Chemical Vapor Deposition as a Gate Dielectric for Metal-Oxide-Semiconductor Devices

Integration of Y2O3 high-k thin film over Si as gate dielectric in high performance CMOS and high-density MOS memory storage capacitor devices is described. Y2O3 film growth by low-pressure chemical vapor deposition induces interfacial reactions and complex SiO2 − x layer growth. It has a graded structure, in crystalline-SiO2 form at Y2O3 side and amorphous SiO2 − x form at Si side. MIS devices based on Y2O3/SiO2-SiO2 − x composite dielectric integrated with Si show high frequency C-V behavior indicative of inversion to accumulation changes in capacitance. Observed bi-directional hysterisis in C-V is detrimental to the functioning of storage capacitor in memory function. Detailed investigation of this effect led to understanding of gate bias controlled emission of carriers as responsible mechanism. Observed anomalous increase in inversion capacitance at low frequency is attributed to additional charges transferred from SiO2 − x/Si interface states. Leakage current and injected charge carrier transport across bilayer interface is dominated by Poole-Frankel (PF) process at low fields and by Fowler-Nordhiem (FN) at high fields. This investigation provides a greater understanding of the complex nature of integration of Y2O3 films.