Negative Capacitance for Boosting Tunnel FET performance
Source abstract
Abstract
We have proposed and investigated a super steep subthreshold slope transistor by introducing negative capacitance of a ferroelectric HfO 2 gate insulator to a vertical tunnel FET for energy efficient computing. The channel structure and gate insulator are systematically designed to maximize the I on /I off ratio. The simulation study reveals that the electric field at the tunnel junction can be effectively enhanced by potential amplification due to the negative capacitance. The enhanced electric field increases the band-to-band tunneling rate and I on /I off ratio, which results in 10× higher energy efficiency than in tunnel FET.
Source: openalex_inverted_index · Quality: candidate unverified · Source record ↗
Research context
OpenAlex topics: Ferroelectric and Negative Capacitance Devices · Semiconductor materials and devices · Advancements in Semiconductor Devices and Circuit Design
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
References (21)
Show source-provided references
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