journal article·2019

A Variation-Aware Ternary Spin-Hall Assisted STT-RAM Based on Hybrid MTJ/GAA-CNTFET Logic

Farzad Razi, Mohammad Hossein Moaiyeri, Ramin Rajaei, Siamak Mohammadi

Publisher page

Abstract

Magnetic random access memory is a promising solution to keep up with the trend of memory sizing. On the other hand, the multiple-valued logic has been considered as a promising solution for some important challenges of the binary integrated circuits. In this paper, a novel ternary magnetic RAM (TMRAM) based on sub-10 nm gate-all-around carbon nanotube transistor (GAA-CNTFET) is proposed. The proposed TMRAM cell utilizes magnetic tunnel junction (MTJs) to provide non-volatility and spin-hall assisted spin-transfer torque method to reduce the write energy. Moreover, GAA-CNTFETs provide ternary operation and enhance the cell performance and efficiency. The read and write circuitry of the proposed magnetic memory cell contains no sense amplifier and bistable feedback, which makes it invulnerable to radiations effects. The efficiency of the proposed TMRAM cell becomes more apparent in the TMRAM block structures due to the reduction in the number of transistors. The proposed approach is simulated using HSPICE and its performance is evaluated in presence of variations in the critical process parameters of MTJ and GAA-CNTFET by Monte-Carlo simulations. The results indicate the correct and efficient operation of the proposed design even in the presence of different process variations.
Source: openalex_inverted_index · Quality: baseline

Research context

OpenAlex topics: Magnetic properties of thin films · Quantum and electron transport phenomena · Advanced Memory and Neural Computing

SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.

References (37)

Show source-provided references
1. 10.1109/ISQED.2013.652363410.1109/ISQED.2013.6523634 ↗
2. 10.1109/TMAG.2015.244955410.1109/TMAG.2015.2449554 ↗
3. 10.1049/iet-cds.2010.034010.1049/iet-cds.2010.0340 ↗
4. VS-CNFET Model.
5. 10.1109/ICCD.2014.697466610.1109/ICCD.2014.6974666 ↗
6. 10.1109/TED.2011.218205310.1109/TED.2011.2182053 ↗
7. 10.1109/ICCAD.2011.610537010.1109/ICCAD.2011.6105370 ↗
8. 10.1145/1391469.139154010.1145/1391469.1391540 ↗
9. 10.1038/s41928-018-0160-710.1038/s41928-018-0160-7 ↗
10. 10.1109/LED.2019.290706310.1109/LED.2019.2907063 ↗
11. 10.1109/LED.2018.279503910.1109/LED.2018.2795039 ↗
12. 10.1109/TNANO.2018.280001510.1109/TNANO.2018.2800015 ↗
13. 10.1007/s10825-017-0980-010.1007/s10825-017-0980-0 ↗
14. Plurality voter circuit
15. 10.1109/TCSI.2013.229502610.1109/TCSI.2013.2295026 ↗
16. 10.1049/iet-cds.2016.021610.1049/iet-cds.2016.0216 ↗
17. 10.1038/nature2299410.1038/nature22994 ↗
18. 10.1109/TVLSI.2018.286976110.1109/TVLSI.2018.2869761 ↗
19. 10.1109/TED.2015.245745310.1109/TED.2015.2457453 ↗
20. 10.1109/TCYB.2018.286849310.1109/TCYB.2018.2868493 ↗
21. 10.1038/s41598-017-11476-710.1038/s41598-017-11476-7 ↗
22. 10.1109/LED.2018.287405510.1109/LED.2018.2874055 ↗
23. Design of a ternary memory cell using CNTFETs10.1109/TNANO.2012.2211614 ↗
24. 10.1109/TED.2015.245742410.1109/TED.2015.2457424 ↗
25. 10.1109/TFUZZ.2017.269740410.1109/TFUZZ.2017.2697404 ↗
26. 10.1016/j.microrel.2016.12.00310.1016/j.microrel.2016.12.003 ↗
27. 10.1109/TCSI.2018.283825810.1109/TCSI.2018.2838258 ↗
28. 10.1109/TEMC.2018.286337810.1109/TEMC.2018.2863378 ↗
29. 10.1016/j.mattod.2017.07.00710.1016/j.mattod.2017.07.007 ↗
30. 10.1109/TNANO.2014.231600010.1109/TNANO.2014.2316000 ↗
31. 10.1109/TMAG.2016.257827810.1109/TMAG.2016.2578278 ↗
32. 10.1063/1.297643510.1063/1.2976435 ↗
33. 10.1063/1.485846510.1063/1.4858465 ↗
34. 10.1088/0022-3727/48/6/06500110.1088/0022-3727/48/6/065001 ↗
35. 10.1109/TMAG.2018.284662310.1109/TMAG.2018.2846623 ↗
36. Compact modeling and circuit design based on ferroelectric tunnel junction and spin-Hall-assisted spin-transfer torque
37. 10.1145/1596543.159654810.1145/1596543.1596548 ↗