Mitigating NDR for Improved RF Performance in $\mathrm{MoS₂}$ Ferroelectric Tunnel FET

The work realized a steep-slope $\mathrm{MoS₂}$ based negative capacitance-tunnel field effect transistor (NC-TMDTFET) through the incorporation of the ferroelectric layer into the gate stack. The proposed device sustained a subthreshold slope of 0.023V/decade and 0.018V/decade in forward and reverse sweep respectively and an $\mathrm{ON/OFF}$ current ratio of $10¹²$. The work investigates the effect of the ferroelectric layer on input and output characteristics. In the subsequent observation, it was noted that as the drain voltage increases, there is a decrease in current, indicating the presence of negative differential resistance (NDR) within the proposed device. However, mitigation of such effect in TMD based NC-TFET has not yet been introduced. Hence, to address the NDR issue hetero-dielectric BOX (H-BOX) is introduced which directly influences the gate-to-drain capacitance of the device. We report a 56.71% reduction in $C_GD$, a 15.83% improvement in intrinsic delay, and a corresponding 48.95% improvement in cutoff frequency due to the introduction of H-BOX resulting enhancement in device speed. These improvements demonstrate that H-BOX integration effectively enhances key parameters making it a viable solution for analog applications that require high performance and low power consumption.