Probing defects in 3D NAND flash memory with temperature-dependent leakage current

This study investigated the defect profiles of highly stacked 3D NAND flash memory using trap-assisted leakage current analysis. By extracting the activation energy (Ea), we examined leakage mechanisms under hydrogen (H) and fluorine (F) gas annealing conditions for device passivation. This temperature-dependent leakage analysis provides a stress minimized probing technique for evaluating trap distributions in 3D NAND devices. This suggests the presence of abundant trap states in the polycrystalline silicon (poly-Si) channel, where trapped carriers are readily activated by the electric field from control gates. In contrast, the Ea under F passivation remained field-independent, and the leakage current increased with temperature. This indicates that while F passivation suppresses bulk poly-Si traps, temperature-sensitive defects at the poly-Si/SiO2 interface persist. Devices with F passivation showed larger subthreshold swing due to higher interface trap densities but higher transconductance (gm) compared to H-passivated devices. This is attributed to reduced trap density inside the poly-Si channel in the F-passivated condition. Series resistance (Rs) and its corresponding Ea further confirmed this behavior; F-passivated devices exhibited lower Rs and reduced Ea of Rs, implying that energy barriers at grain boundaries (GBs) were effectively suppressed. Finally, retention characteristics were also improved under F passivation, supporting the conclusion that carrier transport in the poly-Si channel is more strongly hindered by GB traps in H-passivated devices.