Three-terminal silicon field emitter arrays with integrated anodes

Three-terminal microscale silicon vacuum field emitter arrays with all-around grid structures and integrated anodes are presented. Instead of controlling individual field emitters, a group of emitter tips is gated together in a sub-array design, achieving low-cost batch fabrication in a CMOS-compatible process. Numerical simulations optimize the sub-array structure, while fabrication and three-dimensional integration are accomplished through a combination of electron-beam and optical lithography, dry etching, and wafer bonding techniques. Two device types with identical emitter tips (22.5k) are implemented with 5 × 5 and 2 × 2 sub-arrays. While the 5 × 5 sub-array vacuum triode achieves a higher maximum current density, the 2 × 2 sub-array device offers superior anode current [IA,max = 225 μA (10 nA/tip)], turn-on voltage (112 V), grid control of the emission current (maximum transconductance gm = 8.1 μS), and anode field intensification factor (γ = 87). With the transition to a CMOS platform, these devices demonstrate enhanced control over leakage currents, making them ideally suited for high-radiation environments such as space. Furthermore, they are primed for future high-frequency electronics, with expected performance reaching hundreds of MHz.