Relationship between electrical properties and interface structures of SiO2/4H-SiC prepared by dry and wet oxidation

We have investigated the relationship between the electrical properties and interfacial atomic structure of SiO2/4H-SiC interfaces, prepared by dry and wet thermal oxidation procedures with 4H-SiC (0001) and 4H-SiC (000-1) substrates, using extended x-ray absorption fine structure (EXAFS) spectroscopy and electrical methods. From the current–voltage (I–V) and capacitance–voltage (C–V) measurements, the gate leakage current onset and density of interface states were shown to depend on the thermal oxidation procedure used for creating SiO2/4H-SiC (000-1) interfaces. This dependence was not observed for SiO2/4H-SiC (0001) interfaces. From EXAFS oscillations, we found that C and Si vacancies formed at the SiC side of SiO2/4H-SiC (0001) and SiO2/4H-SiC (000-1) interfaces, respectively. Compressive stress at the SiC sides of SiO2/4H-SiC (0001) and SiO2/4H-SiC (000-1) interfaces prepared with the dry thermal oxidation procedure caused decreases in bond lengths. Stress at the interface was smaller in the case of wet oxidation. Wet oxidation released the interface stress more effectively for 4H-SiC (000-1) substrates than for 4H-SiC (0001) substrates. A high gate leakage current onset related to a high interface charge, while a high density of interface states related to a high interface stress and a high interface roughness.