Analytical thermal resistance network model for calculating each mean die temperature of the multi-chips module combined with quad flat no-leads packaging

With the rapid advancement of next-generation communication technology, traditional Quad Flat No-leads (QFN) packaging is facing challenges to meet functional requirements. Due to its high integration and excellent thermal performance, the Multi-chips Module combined with Quad Flat No-leads (MCM-QFN) packaging is gaining popularity. However, the structural complexity of MCM-QFN packaging and the thermal coupling effect between multiple dies make it challenging to analyze the steady-state thermal distribution of MCM-QFN packaging, which is necessary for assessing the reliability and optimizing the layout design of the multi-chips module. By analyzing the heat dissipation path from each die to the ambient, this paper proposes an analytical thermal resistance network model for calculating each mean die temperature of MCM-QFN packaging. The thermal coupling effect among the multi-chips, the thermal spreading resistance between critical layers, and the boundary conditions and cooling conditions are all considered. All thermal resistances in the model are expressed analytically, and the mean temperature of each chip can be calculated within 0.1 s using MATLAB programming. To validate the accuracy of the proposed model, finite element method (FEM) simulations are conducted to provide a reference for the mean temperature of each chip under four sets of thermal conditions. The data comparison demonstrates that the analytical model is fast and accurate in calculating each mean die temperature of MCM-QFN packaging, with a maximum error of 3.72%, and the calculation speed increased by about 600× compared to that of FEM simulation. Furthermore, the analytical model is able to offer a direction for optimizing the layout design and material selection of MCM-QFN packaging.