journal article·2017-05-01Open access

Development of optimized nanogap plasmonic substrate for improved SERS enhancement

Jayakumar Perumal, Tianxun Gong, Dinish U. S., Kavitha Devi Buddharaju, Patrick Lo Guo-Qiang, Malini Olivo

AIP Advances· Volume 7· Issue 5

Abstract

SERS enhancement factor (EF) of planar substrates depends on the size and shape of the fine nanostructure forming a defect free, well-arranged matrix. Nano-lithographic process is considered to be the most advanced methods employed for the fabrication SERS substrates. Nanostructured plasmonic substrates with nanogap (NG) pattern often results in stable, efficient and reproducible SERS enhancement. For such substrates, NG and their diagonal length (DL) need to be optimized. Theoretically smaller NGs (∼30-40 nm or smaller) results in higher SERS enhancement. However, fabrication of NG substrates below such limit is a challenge even for the most advanced lithography process. In this context, herein, we report the optimization of fabrication process, where higher SERS enhancement can be realized from larger NGs substrates by optimizing their DL of nanostructures between the NGs. Based on simulation we could demonstrate that, by optimizing the DL, SERS enhancement from larger NG substrate such as 60 and 80 nm could be comparable to that of smaller (40nm) NG substrates. We envision that this concept will open up new regime in the nanofabrication of practically feasible NG based plasmonic substrates with higher SERS enhancement. Initial results of our experiments are in close agreement with our simulated study.
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Research context

OpenAlex topics: Gold and Silver Nanoparticles Synthesis and Applications · Plasmonic and Surface Plasmon Research · Near-Field Optical Microscopy

SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.

Affiliations

Agency for Science, Technology and Research 1 Singapore Bioimaging Consortium, , 11 Biopolis Way, #01-02, Helios 138667, Singapore

A*STAR (Agency for Science, Technology and Research) 2 Institute of Microelectronics, , 2 Fusionopolis Way, #08-02, Innovis Tower 138634, Singapore

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