Self‐Alignment Embedded Thin‐Film Transistor with High Transparency and Optimized Performance

Abstract Amorphous oxide semiconductor thin‐film transistors (AOS TFTs) have shown significant potential in the applications of increasingly advanced transparent and flexible electronic devices, where high speed, high transparency, and low power consumption are highly demanded. Yet, typical back‐channel etch (BCE) configuration used in the majority of TFTs still suffers from poor gate controllability, severe electrical field dispersion, relatively large parasitic capacitance and contact resistance. Here, a new embedded structure for TFTs with self‐alignment and even simpler fabrication process, outperforming conventional BCE counterpart in above aspects, is proposed in this work. More concentrated electrical field, improved gate control ability accompanied with lower contact resistance are achieved in the embedded TFTs. Consequently, superior electrical characteristics with subthreshold swing of 106.7 mV dec⁻¹ and mobility as high as 32.10 cm² V⁻¹ s⁻¹ are obtained. In addition, leakage current as well as contact resistance evidently decline compared to that in traditional BCE TFTs. By the assistance of Silvaco TCAD simulation, the performance and mechanism behind are cross‐validated from another perspective. Overall, such embedded configuration has equipped TFTs with appealing performance and it is also possible to enable other devices exploiting such structure with new possibility and thus a broader application.