Cycling‐Induced Degradation of Organic–Inorganic Perovskite‐Based Resistive Switching Memory

Abstract As one key issue of resistive switching (RS) memory, the cycling endurance is poorly understood in hybrid perovskite‐based memory devices. Here, the cycling failure and the corresponding cycling‐induced degradation of CH₃NH₃PbI₃‐based resistive random access memory devices are discussed. The high resistance state clearly decreases with the number of operation cycles, finally triggering irreversible failure in the collapse of switching window. By monitoring the I–V curves for all cycles, a negative set event is observed to be the critical turning point that considerably accelerates the cycling degradation rate. The decrease of |V_set| and |V_reset| indicates a reduction of the migration barrier of iodine vacancies (V_I), which accounts for the appearance of a negative set after cycling. The understanding of RS cycling degradation can promote the optimization of device endurance by slowing the defect accumulation rate.