Dust‐Sized High‐Power‐Density Photovoltaic Cells on Si and SOI Substrates for Wafer‐Level‐Packaged Small Edge Computers

Abstract Advancement in microelectronics technology enables autonomous edge computing platforms in the size of a dust mote (<1 mm), bringing efficient and low‐cost artificial intelligence close to the end user and Internet‐of‐Things (IoT) applications. The key challenge for these compact high‐performance edge computers is the integration of a power source that satisfies the high‐power‐density requirement and does not increase the complexity and cost of the packaging. Here, it is shown that dust‐sized III–V photovoltaic (PV) cells grown on Si and silicon‐on‐insulator (SOI) substrates can be integrated using a wafer‐level‐packaging process and achieve higher power density than all prior micro‐PVs on Si and SOI substrates. The high‐throughput heterogeneous integration unlocks the potential of large‐scale manufacturing of these integrated systems with low cost for IoT applications. The negative effect of crystallographic defects in the heteroepitaxial materials on PV performance diminishes at high power density. Simultaneous power delivery and data transmission to the dust mote with heteroepitaxially grown PV are also demonstrated using hand‐held illumination sources.