High‐κ Dielectric (HfO₂)/2D Semiconductor (HfSe₂) Gate Stack for Low‐Power Steep‐Switching Computing Devices

Abstract Herein, a high‐quality gate stack (native HfO₂ formed on 2D HfSe₂) fabricated via plasma oxidation is reported, realizing an atomically sharp interface with a suppressed interface trap density (D_it ≈ 5 × 10¹⁰ cm⁻² eV⁻¹). The chemically converted HfO₂ exhibits dielectric constant, κ ≈ 23, resulting in low gate leakage current (≈10⁻³ A cm⁻²) at equivalent oxide thickness ≈0.5 nm. Density functional calculations indicate that the atomistic mechanism for achieving a high‐quality interface is the possibility of O atoms replacing the Se atoms of the interfacial HfSe₂ layer without a substitution energy barrier, allowing layer‐by‐layer oxidation to proceed. The field‐effect‐transistor‐fabricated HfO₂/HfSe₂ gate stack demonstrates an almost ideal subthreshold slope (SS) of ≈61 mV dec⁻¹ (over four orders of I_DS) at room temperature (300 K), along with a high I_on/I_off ratio of ≈10⁸ and a small hysteresis of ≈10 mV. Furthermore, by utilizing a device architecture with separately controlled HfO₂/HfSe₂ gate stack and channel structures, an impact ionization field‐effect transistor is fabricated that exhibits n‐type steep‐switching characteristics with a SS value of 3.43 mV dec⁻¹ at room temperature, overcoming the Boltzmann limit. These results provide a significant step toward the realization of post‐Si semiconducting devices for future energy‐efficient data‐centric computing electronics.