All‐Ferroelectric Memtransistors for Brain‐Inspired Computing

ABSTRACT In‐memory computing is pursued to overcome the memory and power walls inherent to the von Neumann architecture. However, heterosynaptic memtransistors with higher modulation dimensionality and enhanced memory capability still suffer from a limited conductance dynamic range and few gate‐controlled states, constraining learning precision. Here, an all‐ferroelectric memtransistor is demonstrated that synergistically combines a P(VDF‐TrFE) ferroelectric gate dielectric with an α‐In ₂ Se ₃ ferroelectric semiconductor channel. As the third‐terminal modulator, the P(VDF‐TrFE) gate sets the channel Fermi level via out‐of‐plane polarization reversal, while the channel's in‐plane polarization at the pre‐ and post‐synaptic drain and source asymmetrically tunes the contact Schottky barriers. The coupling of these two distinct ferroelectric effects generates four well‐separated nonvolatile conductance states in fully polarized configurations, introduces 12 third‐terminal states via ferroelectric‐gate domain control, and enables 100 intermediate states in the ferroelectric channel through source–drain pulses. The device emulates heterosynaptic regulation, enabling global enhancement or suppression of synaptic features. Compared with conventional designs, it offers a dynamic range of up to 331.91 and 12 gate‐controlled states. An adaptive neural network implemented with measured device characteristics achieves 95.68% pattern recognition accuracy, with gate pulses selecting optimal operational regimes. This work provides an effective device platform for high‐performance brain‐inspired computing.