Sub‐3 V ZnO Electrolyte‐Gated Transistors and Circuits with Screen‐Printed and Photo‐Crosslinked Ion Gel Gate Dielectrics: New Routes to Improved Performance

Abstract A facile, high‐resolution patterning process is introduced for fabrication of electrolyte‐gated transistors (EGTs) and circuits using a photo‐crosslinkable ion gel and stencil‐based screen printing. The photo‐crosslinkable gel is based on a triblock copolymer incorporating UV‐sensitive terminal azide functionality and a common ionic liquid. Using this material in conjunction with conventional photolithography and stenciling techniques, well‐defined 0.5–1 μm thick ion gel films are patterned on semiconductor channels as narrow as 10 μm. The resulting n‐type ZnO EGTs display high electron mobility (>2 cm² Vs⁻¹) and on/off current ratios (>10⁵). Further, EGT‐based inverters exhibit static gains >23 at supply voltages below 3 V, and five‐stage EGT ring oscillator circuits display dynamic propagation delays of 50 μs per stage. In general, the screen printing and photo‐crosslinking strategy provides a clean room‐compatible method to fabricate EGT circuits with improved sensitivity (gain) and computational power (gain × oscillating frequency). Detailed device analysis indicates that significantly shorter delay times, of order 1 μs, can be obtained by improving the ion gel conductance.