Structural and Room‐Temperature Transport Properties of Zinc Blende and Wurtzite InAs Nanowires

Abstract Here, direct correlation between the microstructure of InAs nanowires (NWs) and their electronic transport behavior at room temperature is reported. Pure zinc blende (ZB) InAs NWs grown on SiO₂/Si substrates are characterized by a rotational twin along their growth‐direction axis while wurtzite (WZ) InAs NWs grown on InAs (111)B substrates have numerous stacking faults perpendicular to their growth‐direction axis with small ZB segments. In transport measurements on back‐gate field‐effect transistors (FETs) fabricated from both types of NWs, significantly distinct subthreshold characteristics are observed (I_on/I_off ∼ 2 for ZB NWs and ∼10⁴ for WZ NWs) despite only a slight difference in their transport coefficients. This difference is attributed to spontaneous polarization charges at the WZ/ZB interfaces, which suppress carrier accumulation at the NW surface, thus enabling full depletion of the WZ NW FET channel. 2D Silvaco‐Atlas simulations are used for ZB and WZ channels to analyze subthreshold current flow, and it is found that a polarization charge density of ≥10¹³ cm⁻² leads to good agreement with experimentally observed subthreshold characteristics for a WZ InAs NW given surface‐state densities in the 5 × 10¹¹–5 × 10¹² cm⁻² range.