journal article·2025-05

Plasma‐Engineered High‐Performance Tellurium Field‐Effect Phototransistors

Uisik Jeong, Hyun Yeol Rho, Joo on Oh, Debottam Daw, Yuseong Lee, Kwun‐Bum Chung, Anamika Sen, Sunkook Kim

Advanced Functional Materials· Volume 35· Issue 19
Publisher page

Abstract

Abstract Promising 2D materials suitable for low‐temperature processing are crucial for advancing beyond Moore's law. While p‐type performance is as essential as n‐type in CMOS technology, the development of high‐performance p‐type 2D materials has lagged behind their n‐type counterparts. Here, high‐performance p‐type tellurium (Te) field‐effect transistors (TeFETs) that undergo plasma treatment at low temperatures to enhance their electrical and optoelectrical properties are presented. Ar plasma‐treated Te shows significantly improved crystallinity compared to untreated counterparts, confirmed by various characterization techniques. Plasma treatment shifts the Fermi level toward the valence band and induces subgap states near the valence band in the Te film. A valence band offset of 0.2 eV and 30.6% surface flattening are confirmed in plasma‐treated TeFETs. The electrical performance of plasma‐treated TeFETs exhibits a 20‐fold increase in the Ion/Ioff ratio, from 1.2 × 104 to 2.7 × 104, and a 51% reduction in subthreshold swing, from 19.1 to 9.4 V per decade, compared to pristine devices. Stability and bias stress tests show resilience to degradation after plasma treatment. Notably, optoelectrical performance improves due to the trap‐assisted photogating effect. These findings provide a promising pathway for improving p‐type materials at low temperatures, facilitating their use in various next‐generation electronic platforms.
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Research context

OpenAlex topics: Advanced Semiconductor Detectors and Materials · Nanowire Synthesis and Applications · Semiconductor Quantum Structures and Devices

SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.

Affiliations

Multifunctional Nano Bio Electronics Lab School of Advanced Materials Science and Engineering Sungkyunkwan University Suwon 16419 South Korea

Department of Semiconductor and Display Engineering Sungkyunkwan University Suwon 16419 South Korea

DRAM Process Architecture Team Samsung Electronics Company Hwaseong 18479 South Korea

Center for Integrated Nanostructure Physics Sungkyunkwan University Suwon 16419 South Korea

Division of Physics and Semiconductor Science Dongguk University Seoul 04620 South Korea

Funding

National Research Foundation of Korea

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