MoS₂/GaN Junction Field‐Effect Transistors with Ultralow Subthreshold Swing and High On/Off Ratio via Thickness Engineering for Logic Inverters

Abstract In recent years, 2D/3D heterojunction electronic devices have attracted considerable attention. As the size decreases, enhancing the speed of MOSFETs, reducing the subthreshold swing (SS), and lowering the power consumption (P) have become challenging. Therefore, in the post‐Moore era, in response to the continuation of Moore's law, junction field‐effect transistors (JFETs) based on mixed‐dimensional MoS₂/GaN heterojunctions are proposed via thickness engineering. Accordingly, flat hetero interface and large potential barrier height of 5 eV across the heterojunction, an ultra‐low SS of 60.9 mV dec⁻¹ (The Boltzmann limit is 60 mV dec⁻¹) is achieved at V_ds = 0.1 V when the MoS₂ thickness is 10 nm. Additionally, a high I_on/I_off ratio of 10⁷ and a saturation current density (J_ds) of 0.16 µA µm⁻¹ is achieved. As the thickness of MoS₂ increased from 6 to 16 nm, the working mode transitioned from enhancement mode to depletion mode. The depletion region across the channel is verified using computer‐aided design technology. Finally, an N‐type load inverter with a maximum voltage gain of 4 and a minimum static P of 25 nW is applied. Overall, the work provides a universal strategy for constructing a series of high‐performance transition metal dichalcogenide/GaN JFETs.