Reconfigurable Logic Gates Capable of Device‐Level Parallel Processing Through Multi‐Input Synaptic Device

Abstract Synaptic devices have gained prominence as viable alternatives to conventional complementary metal‐oxide‐semiconductor‐based (CMOS) electronics in the information processing field owing to their inherent advantages in analog and parallel operations. The potential of synaptic devices has not yet been fully utilized for logic operations because only the conventional binary logic structure has been applied to analog synaptic devices, leading to the loss of advantages unique to analog signals. To resolve this issue, an innovative concept is proposed: an analog logic gate that can perform parallel operations at the device level and is coupled with logic reconfigurations, enabling comprehensive analog computation. This logic gate comprises two synaptic devices with different retention characteristics, adjusted by the side‐chain engineering of an organic polymer. The long‐term and short‐term synaptic devices serve as reconfigurable synapse for logic mode selection and parallel processable logic synapse, respectively. In this study, the reconfigurable and parallel processable synaptic logic circuit is effectively implemented in a personalized disease risk diagnostic system. This innovative approach not only allows for the simultaneous computation of analog‐formed diagnostic data, but also enhances both computing efficiency and system complexity in general synaptic systems.