Integration Challenges for Low Dielectric Constant Materials

The more advanced an integrated circuit becomes, the more stringent are the demands for certain properties of a dielectric or insulating material. In addition, it is essential that the layer maintains its specific electrical, physical and chemical properties after incorporation in the device structure and during subsequent processing. Due to temperature budget constraints and the accelerated decrease of feature sizes below 0.25 μm one can no longer rely on traditional choices but has to search for alternatives, both for low and high permittivity replacements. In this article we survey currently used low dielectric constant materials and future trends for microelectronic applications. Modern semiconductor circuit interconnection techniques now focus on the integration of copper-based thin film metallization and low dielectric constant (low-κ) insulating thin films using a strategy known as damascene processing. The objective of this approach is the optimization of information processing speed in the circuit by minimizing resistive and capacitive delays resulting from the electrical field interactions between adjacent conductors.