New DTMOS-Based Charge- and Flux-Controlled Memtranstor Emulators

Memtranstors are emerging higher-order memory elements that establish a state-dependent constitutive relationship between electric charge and magnetic flux, making them attractive for adaptive analog electronics, neuromorphic computing, nonlinear dynamical systems, and memory-enabled signal processing applications. However, existing memtranstor emulators predominantly rely on operational amplifiers, analog multipliers, current conveyors, or behavioral models, leading to increased circuit complexity and limited suitability for monolithic CMOS integration. This paper presents a unified transistor-level dynamic-threshold MOS (DTMOS) framework for realizing both charge-controlled and flux-controlled memtranstor emulators. The proposed architectures synthesize direct and inverse memtranstances through capacitive state integration, state-dependent DTMOS conductance modulation, and current-domain affine processing, thereby eliminating the need for composite active building blocks. Closed-form analytical expressions are derived for both constitutive relations and explicitly related to transistor-level parameters, bias conditions, and state-storage elements. The theoretical framework is further supported by comprehensive analyses of channel-length modulation, finite output resistance, device mismatch, DTMOS body-effect deviations, leakage mechanisms, pseudo-resistor non-idealities, parasitic capacitances, and small-signal stability. Cadence Virtuoso simulations performed in a 180 nm triple-well CMOS technology validate the analytical predictions and demonstrate the characteristic butterfly shaped pinched hysteresis loops of both emulators. The proposed circuits operate from a single 0.8 V supply while dissipating approximately 22 μW and 36 μW for the charge-controlled and flux-controlled realizations, respectively, and exhibit electronic tunability, together with robustness against process and temperature variations. Representative implementations of reconfigurable frequency-selective circuits and a memtranstor-based envelope detector further demonstrate the practical applicability of the proposed architectures. To the best of the author’s knowledge, this work presents the first unified transistor-level DTMOS constitutive synthesis framework for realizing both direct and inverse memtranstive behavior, providing a scalable foundation for future adaptive mixed-signal integrated circuits, programmable analog memory systems, neuromorphic hardware, and in-memory computing platforms.