Device characteristics improvement of a-In–Ga–Zn–O TFTs by low-temperature annealing

Abstract A low-temperature process to improve performances of a-In–Ga–Zn–O (a-IGZO) thin-film transistors (TFTs) fabricated at room temperature was examined. Two deposition methods, pulsed laser deposition (PLD) and RF magnetron sputtering were employed to deposit the a-IGZO channels. For the PLD case, the TFT characteristics were improved significantly by wet annealing at dew point (d.p.) of 50 °C at the annealing temperature of 200 °C. For the sputtered TFTs, a wider range of annealing temperature from 100 to 200 °C was examined. It was found that annealing at ≥ 150 °C improved the TFT characteristics when dry annealing was employed. On the other hand, wet annealing also improved μ sat and S values, but very large negative threshold voltage ( V th ) shift was observed. These results indicate that the annealing at 150 °C is enough to obtain mobility ( μ sat ) as large as 8 cm 2 Vs − 1 , but annealing temperature as high as 200 °C provides larger μ sat comparable to those obtained by 400 °C annealing. It is speculated that the large negative V th shift originates from compensated donors in as-deposited sputtered films.