Facile Five-Step Heteroepitaxial Growth of GaAs Nanowires on Silicon Substrates and the Twin Formation Mechanism

Monolithic integration of III-V semiconductors with Si has been pursued for some time in the semiconductor industry. However, the mismatch of lattice constants and thermal expansion coefficients represents a large technological challenge for the heteroepitaxial growth. Nanowires, due to their small lateral dimension, can relieve strain and mitigate dislocation formation to allow single-crystal III-V materials to be grown on Si. Here, we report a facile five-step heteroepitaxial growth of GaAs nanowires on Si using selective area growth (SAG) in metalorganic chemical vapor deposition, and we further report an in-depth study on the twin formation mechanism. Rotational twin defects were observed in the nanowire structures and showed strong dependence on the growth condition and nanowire size. We adopt a model of faceted growth to demonstrate the formation of twins during growth, which is well supported by both a transmission electron microscopy study and simulation based on nucleation energetics. Our study has led to twin-free segments in the length up to 80 nm, a significant improvement compared to previous work using SAG. The achievements may open up opportunities for future functional III-V-on-Si heterostructure devices.