Gate-Tunable Polarization Gradient in 2D Polar Semiconductor for Synaptic Transistor

Neuromorphic computing, inspired by the brain’s energy-efficient parallelism processing, offers a transformative alternative to overcome von Neumann bottlenecks. A critical challenge is to replicate the dynamic plasticity of biological synapses using artificial transistor devices capable of nonvolatile, stimulus-tunable charge transport. Existing synaptic transistors mainly rely on mechanisms such as ion migration, ferroelectric switching, floating gate coupling or charge trapping, yet these approaches are inherently constrained by issues like ionic diffusion, polarization fatigue, and charge leakage─that degrade reliability and memory retention. Here, we report a gate-tunable polarization gradient in two-dimensional (2D) polar materials, which can serve as a different mechanism to simulate biological synapses. The gate-controlled out-of-plane polarization in 2D polar materials leads to hysteresis-type polarity potential modulation, enabling nonvolatile charge transport. This mechanism allows the device to achieve a memory retention time of approximately 331 s at room temperature, surpassing most conventional synaptic transistors and rivaling the best-reported synaptic systems. Moreover, this polarization gradient-modulated synaptic transistor exhibits exceptional operational resilience, maintaining switching ratios over 10 6 –10 4 across 150–300 K─enabling robust emulation of both short- and long-term synaptic plasticity under extreme conditions and also sustains stable synaptic responses over 2000 gate–pulse cycles, demonstrating excellent cyclic endurance. Our study not only shows a gate-controlled out-of-plane polarization phenomenon in 2D polar materials but also presents a different materials design strategy and operating mechanism for high-performance artificial synaptic devices, toward energy-efficient, biologically inspired computing architectures.