Vertically Integrated Dual-Memtransistor Enabled Reconfigurable Heterosynaptic Sensorimotor Networks and In-Memory Neuromorphic Computing

Neuromorphic in-memory computing requires an area-efficient architecture for seamless and low-latency parallel processing of large volumes of data. Here, we report a compact, vertically integrated/stratified field-effect transistor (VSFET) consisting of a 2D nonferroelectric MoS 2 FET channel stacked on a 2D ferroelectric In 2 Se 3 FET channel. Electrostatic coupling between the ferroelectric and nonferroelectric semiconducting channels results in hysteretic transfer and output characteristics of both FETs. The gate-controlled MoS 2 memtransistor is shown to emulate homosynaptic plasticity behavior with low nonlinearity, low epoch, and high accuracy supervised (ANN─artificial neural network) and unsupervised (SNN─spiking neural network) on-chip learning. Further, simultaneous measurements of the MoS 2 and In 2 Se 3 transistor synapses help to realize complex heterosynaptic cooperation and competition behaviors. These are shown to mimic advanced sensorimotor NN-controlled gill withdrawal reflex sensitization and habituation of a sea mollusk (Aplysia) with ultralow power consumption. Finally, we show logic reconfigurability of the VSFET to realize Boolean gates, thereby adding significant design flexibility for advanced computing technologies.