Sub‐Nanometer Ferroelectric Tunnel Junctions With Record‐High on‐Current Density Through Synergistic Microwave Annealing and High‐Field Activation

ABSTRACT High‐density memory systems require a high on‐state current density (J _on ) to ensure fast read speeds and large sensing margins in cross‐point array applications. However, achieving high J _on in atomically thin ferroelectric tunnel junctions (FTJs) remains an unmet challenge, hindered by parasitic interfacial layer (IL), depolarization fields, and phase instability that favors the non‐ferroelectric tetragonal phase. Here, a record‐high J _on operation in sub‐nanometer FTJs is enabled by combining aggressive device area scaling with low‐temperature microwave annealing. This approach effectively suppresses IL growth, reducing the IL thickness from 0.94 to 0.41 nm, and simultaneously enables a robust orthorhombic phase transition under high electric fields (>15 MV cm ⁻¹ ) without dielectric breakdown. By leveraging interface engineering and extreme area scaling, ∼0.9 nm FTJ achieves a record‐high J _on exceeding 10 ⁵ A cm ^{− 2} at low voltage (∼0.4 V) while maintaining a stable on/off ratio (>15). This strategy also induces exceptional endurance (>10 ⁸ cycles) and retention (projected ∼10 years at 85°C), attributed to the reduced depolarization fields. Furthermore, simulations based on experimental data provide guidelines for achieving ideal FTJ performance at the ultimate scaling limits. Our comprehensive study establishes a clear pathway toward reliable FTJ memory suitable for high‐density array applications without additional material complexity.