Top-Down Fabrication of Silicon Nanowire Field-Effect Transistors Using Thermal Scanning Probe Lithography

Silicon nanowire field-effect transistors (SiNW FETs) are promising transducers for biosensing. We describe a hybrid technique for top-down fabrication of SiNW FETs that combines thermal scanning probe lithography (t-SPL) with conventional photolithography. SiNW structures were produced with a simple PPA/hard-mask/substrate stack, using a p-type silicon-on-insulator substrate. Analysis of device dimensions showed a linear relationship between the designed and fabricated SiNW widths, with a slope close to unity and a constant offset, indicating excellent dimensional control. Measurements in a liquid front-gate configuration showed reproduceable but low current electrical characteristics. The devices exhibited n-type behavior indicating a change in the majority carrier type, which may have been influenced by charges at or close to the silicon/silicon dioxide interface. Our results demonstrate that t-SPL offers a flexible and low-cost method for fabricating SiNW FET.